EMPH_EN=0, EMPH_CUR_CTRL=00, EMPH_PULSE_CTRL=00, PFD_CLKGATE=0, DEV_PULLDOWN=0, PFD_CLK_SEL=00
USB PHY Analog Control Register
TESTCLK_SEL | Test clock selection to analog test |
PFD_CLKGATE | This bit field controls clock gating (disabling) for the PFD pfd_clk output for power savings when the PFD is not used 0 (0): PFD clock output is enabled 1 (1): PFD clock output is gated (Default) |
PFD_CLK_SEL | This bit field for the PFD selects the frequency relationship between the local pfd_clk output and the exported USB1PFDCLK 0 (00): USB1PFDCLK is the same frequency as the xtal clock (Default) 1 (01): USB1PFDCLK frequency is pfd_clk divided by 4 2 (10): USB1PFDCLK frequency is pfd_clk divided by 2 3 (11): USB1PFDCLK frequency is the same as pfd_clk frequency |
PFD_FRAC | PFD fractional divider setting used to select the pfd_clk output frequency |
DEV_PULLDOWN | Setting this field to 1’b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins 0 (0): The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 1 (1): The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode. |
EMPH_PULSE_CTRL | Controls pre-emphasis time duration for the High Speed TX drivers after each data transition when the USBPHY_ANACTRL[EMPH_EN] bit is set high to 1’b1 0 (00): Minimum duration of pre-emphasis current after each data transition 3 (11): Maximum duration of pre-emphasis current after each data transition |
EMPH_EN | Enables pre-emphasis for the High-Speed TX drivers 0 (0): No pre-emphasis is used on HS TX output drivers 1 (1): Enables pre-emphasis for HS TX output drivers |
EMPH_CUR_CTRL | Controls the amount of pre-emphasis current added for the High-Speed TX drivers after each data transition when the USBPHY_ANACTRL[EMPH_EN] bit is set high to 1’b1 0 (00): No pre-emphasis current is enabled for the HS TX drivers 1 (01): One unit of pre-emphasis current is enabled for the HS TX drivers 2 (10): Two units of pre-emphasis current are enabled for the HS TX drivers 3 (11): Three units of pre-emphasis current are enabled for the HS TX drivers |
PFD_STABLE | PFD stable signal from the Phase Fractional Divider. |